1. Field of the Invention
The present invention relates to a multilayer ceramic capacitor and a structure for mounting a multilayer ceramic capacitor on a circuit board.
2. Description of the Related Art
In accordance with the recent trend for the miniaturization of electronic products, the demand for a relatively small multilayer ceramic electronic component having a large capacitance has increased.
Therefore, efforts to stack thin dielectric layers and internal electrodes in greater amounts have been attempted using various methods, and recently, a multilayer ceramic electronic component in which the thickness of dielectric layers is reduced and the number of dielectric layers stacked therein is increased has been manufactured.
Accordingly, the multilayer ceramic electronic component is able to be miniaturized, due to the dielectric layers and the internal electrodes being thinned, allowing the number of stacked layers to be increased for the implementation of high capacitance.
As described above, the multilayer ceramic electronic component is able to be miniaturized and have an increased number of stacked layers, thereby implementing high capacitance. However, a thickness of the resultant multilayer ceramic electronic component may be greater than a width thereof, and when the multilayer ceramic electronic component is mounted on a board, it may frequently topple over, whereby a failure rate in mounting the multilayer ceramic electronic component has increased.
In addition, in the case in which a multilayer ceramic electronic component is manufactured to have a thickness greater than a width, a Tombstone defect, in which an electronic component is lifted upwardly and sloped when being mounted on a board, due to the surface tension of solder, i.e., a Manhattan phenomenon may occur.
Thus, research into improvements in reliability by preventing multilayer ceramic electronic components from toppling over when being mounted on a board and avoiding a Tombstone defect, while implementing high capacitance, remains required.
(Patent Document 1) Japanese Patent Laid-Open Publication No. 2005-129802